Analog IP in TSMC 90 nm

VivEng has developed silicon-proven hard analog IP for power management, clocking, and ambient sensing in the TSMC 90 nm embedded flash process technology, and currently offers the following:

• Bandgap reference block with trimmable reference voltage, bias currents, over- and under-temperature alerts, and power-on reset

• LDO with 5 V input, 1.8 V output, 20 mA load, no external capacitor needed, safe operation in saturation down to 1.6 V input

• LDO with 5 V input, 1.2 V output, 20 mA load, no external capacitor needed, light load mode for 100 uA load with 2 uA internal consumption

• LDO with 3.3 V input, 1.2 V output, 10 mA load, no external capacitor needed

• LDO with 3.3 V input, 1.2 V output, 50 mA load, no external capacitor needed

• LDO with 3.3 V input, 1.2 V output, 100 mA load, no external capacitor needed

• 15 MHz clock oscillator with instant start, 4-bit digital control, and operating range from 8 to 24 MHz

• Thermal noise-based random bit generator operating at 0.2 to 2 MHz, with typical quiescent current of 50 uA

• Photosensitive alarm/trigger for ambient light detection, with trimmable threshold level

• Combined analog cell - compete solution for SIM and Smart card ICs

Please send inquiries to info@viveng.com.